Google’s upcoming Tensor G5 and Tensor G6 chipsets, developed by its gChips division, represent a substantial shift in design and manufacturing. With the Tensor G5 (codenamed “Laguna”) expected to debut in the Pixel 10 series, Google is switching from Samsung’s Exynos-based production to TSMC’s advanced 3nm-class N3E process. This process is the same one used for Apple’s A18 Pro chip in the iPhone 16 Pro series and is known for its cutting-edge efficiency and performance.
Key Specifications for Tensor G5:
- CPU Structure: The Tensor G5 will feature an updated CPU configuration, including:
- 1x Arm Cortex-X4 prime core for peak performance.
- 5x Cortex-A725 performance cores.
- 2x Arm Cortex-A520 efficiency units.
- GPU Upgrades: The GPU will receive a significant upgrade with a dual-core Imagination Technologies DXT-48-1536 unit clocked at 1.1 GHz. This new GPU will support ray tracing—marking a first for Tensor chipsets—and will feature GPU Virtualization, enabling faster graphics processing in virtual environments.
- AI and NPU Enhancements: The Tensor G5’s Neural Processing Unit (NPU) is set to offer a 14% improvement in AI-related tasks, further enhancing Google’s focus on AI-driven processing in its devices.
Looking ahead, the Tensor G6 (codenamed “Malibu”) is anticipated to leverage TSMC’s upcoming N3P node, still based on 3nm technology but with additional benefits. N3P promises up to 5% higher frequency, 7% lower power consumption, and a reduction in surface area by about 4% compared to N3E. This indicates that the Tensor G6 will likely be even more efficient and compact, potentially allowing Google’s future devices to handle more demanding applications with better power efficiency.
This shift to TSMC’s processes aligns with Google’s ambitions to strengthen the Tensor lineup in performance, efficiency, and feature set, keeping pace with other top-tier mobile SoCs.
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